Cortex A53 Core：

? 4x Cortex-A53 processors

? Target frequency of 1.8GHz

? Support of 64-bit Armv8-A architecture

? Floating Point Unit (FPU) with support of the VFPv4-D16 architecture

? 32 KB L1 Instruction Cache

? 32 KB L1 Data Cache

? 512 KB unified L2 cache

Cortex M4 Core：

? 1x Cortex-M4 processor

?frequency of 400MHz

? 256 KB tightly coupled memory (TCM，128 KB TCMU, 128 KB TCML)

? 2GB

? DDR4

? 8GB

? eMMC Flash

LCDIF Display Controller:

? Support up to 2 layers of overlay

? Support up to 1080p60 display through MIPI DSI

MIPI Interface:

? 4-lane MIPI CSI interface,operating up to a maximum bit rate of 1.5 Gbps.

? 4-lane MIPI DSI interface,operating up to a maximum bit rate of 1.5 Gbps.

Audio:

? SPDIF input and output, including a new Raw Capture input mode

?Five synchronous audio interface (SAI) modules supporting I2S,AC97, TDM,codec/DSP,and DSD interfaces, including one SAI with 8 Tx and 8 Rx lanes, one SAI with 4 Tx and 4 Rx lanes,two SAI with 2 Tx and 2 Rx lanes,and one SAI with 1 Tx and 1Rx lane. Support over 20 channels of audio subject to I/O limitations.

? 8-Channel Pulse Density Modulation (PDM) input

3D GPU Core:

? GCNanoUltra

? Support OpenGL ES 1.1, 2.0

? Support OpenVG 1.1

? TrustZone support using a local MMU to manage secure regions

2D GPU Core:

? GC320

? Support multi-source composition

? Support one-pass filter

Decoder：

? 1080p60 VP9 Profile 0, 2 (10-bit)

? 1080p60 HEVC/H.265 Decoder

? 1080p60 AVC/H.264 Baseline, Main, High decoder

? 1080p60 VP8

Encoder：

? 1080p60 AVC/H.264 Encoder

? 1080p60 VP8

One PCI Express (PCIe)

? Single lane supporting PCIe Gen2

? Dual mode operation to function as root complex or endpoint

? Integrated PHY interface

? Support L1 low power sub-state

Two USB 2.0 OTG controllers with integrated PHY interfaces

Two Ultra Secure Digital Host Controller (uSDHC) interfaces:

? SD/SDIO 3.0 compliance with 200 MHz SDR signaling to support up to 100MB/sec

? Support for SDXC (extended capacity)

? 1.8 V and 3.3 V operation, but do not support 1.2V operation.

One Gigabit Ethernet controller：

? support for Energy Efficient Ethernet (EEE)

? Ethernet AVB,

? IEEE 1588

Four Universal Asynchronous Receiver/Transmitter (UART) modules：

? 7- or 8-bit data words, 1 or 2 stop bits, programmable parity (even,odd, or none)

? Programmable baud rates up to 4 Mbps.

? 32-byte FIFO on Tx and 32half-word FIFO on Rx supporting auto-baud

Four I2C modules：

I2C provides serial interface for external devices. Data rates of up to 320 kbps are supported.

Three eCSPI modules：

Full-duplex enhanced Synchronous Serial Interface, with data rate up to 52 Mbit/s. Configurable to support Master/Slave modes, four chip selects to support multiple peripherals.

The FlexSPI module acts s an interface to external serial flash devices. This module contains the following features:

? Flexible sequence engine to support various flash vendor devices

? Single pad/Dual pad/Quad pad mode of operation

? Single Data Rate/Double Data Rate mode of operation

? Parallel Flash mode

? DMA support

? Memory mapped read access to connected flash devices

? Multi master access with priority and flexible and configurable buffer for each master