資料介紹
This is a remarkable book.
Jason Andrews knows about the hardware and the software. He knows about the
people, the tools, and the methodologies in the middle ground between hardware
and software.
He can also write, explaining complex things so that you can really understand them.
One of the main reasons this middle area is so complex is there are just too many
interacting issues to understand and too many decisions to make.
Jason takes care to enumerate the issues, explain how they interact, and describe the options for dealing with them.
Best of all, he explains which tools and methodologies are applicable for each situation.
This is crucial because there are many distinct solutions for the problem, and
you cannot possibly use them all. You need to make an informed judgment on what
to do when.
Jason has either used or implemented most of these solutions, some of them twice,
and he gives a very informed tour of the land and guides you through the possible
compromises.
Please note that while Jason and I work for a verification company (Verisity) that
would love to sell you verification solutions, this book is decidedly generic. It tells you what works, what does not, and why.
While the title of the book is Co-Verification of Hardware and Software for ARM SoC
Design, I think this book has wider applicability. In fact, if any of the following apply,then you should begin by reading this book:
■ You are involved in the verification of products that contain both hardware
and software, regardless of whether they are SoC-based or ARM-based.
■ You are working on one side of the HW/SW divide, and want to see what the
other side looks like.
■ You are interested in creating tools for this area.
- SoC設計流程
- 機器人和軟件人協同智能仿真方法與技術研究 39次下載
- SoC設計中的驗證技術有哪些 12次下載
- SoC設計流程
- 如何進行SoC嵌入式軟件架構和控制器SoC內存管理單元的硬件設計
- SoC多語言協同驗證平臺技術研究 12次下載
- 基于OMAP3530硬件平臺的ARM和DSP協同開發方法 21次下載
- 可測性DSP軟硬件協同仿真驗證平臺設計 39次下載
- 基于ARM9的AFDX-ES SoC驗證平臺的構建與實現
- 基于軟硬件協同設計的低功耗生理信號處理ASIC設計
- 基于SOC的USB主設備的軟硬件協同驗證
- SoC芯片驗證技術的研究
- 一種數?;旌?b class="flag-6" style="color: red">SoC 設計協同仿真的驗證方法
- 一種數模混合SoC 設計協同仿真的驗證方法
- 基于SOC 的VC-1解碼器軟硬件協同設計及驗證
- 使用Zynq平臺進行嵌入式軟件和FPGA設計時有哪些挑戰 476次閱讀
- 移動SoC的時鐘驗證 631次閱讀
- 軟件仿真、硬件仿真、原型驗證是如何工作的? 777次閱讀
- 硬件算法協同設計 778次閱讀
- 基于指令級模擬器加邏輯仿真器實現協同驗證環境的搭建 2534次閱讀
- 采用Altera Stratix II EP2S60器件實現SoC系統的FPGA實時驗證 2340次閱讀
- SoC設計的可擴展驗證解決方案 846次閱讀
- 基于片上系統的SOC設計驗證方案 1464次閱讀
- Veloce仿真環境下的SoC端到端硬件加速器功能驗證 3491次閱讀
- 基于FPGA的Soc原型設計 2614次閱讀
- 用于軟件驗證的硬件加速仿真之一:物理和虛擬探針 1962次閱讀
- Board從入門到精通(五):軟硬件協同設計 2108次閱讀
- 基于FPGA的軟硬件協同仿真加速技術 5077次閱讀
- 片上系統SoC設計流程 2333次閱讀
- 龍芯處理器IP核的FPGA驗證平臺設計 3325次閱讀
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