Description
The Cypress CY2 series of network circuits is produced using
advanced 0.35-micron CMOS technology, achieving the
industry!s fastest logic.
The Cypress CY2DL814 fanout buffer features a single
LVDS-, LVPECL-, or LVTTL-compatible input and four LVDS
output pairs.
Designed for data-communication clock management applica-
tions, the fanout from a single input reduces loading on the
input clock.
The CY2DL814 is ideal for both level translations from single
ended to LVDS and/or for the distribution of LVDS-based clock
signals. The Cypress CY2DL814 has configurable input and
output functions. The input can be selectable for
LVPECL/LVTTL or LVDS signals while the output driver!s
support standard and high drive LVDS. Drive either a 50-ohm
or 100-ohm line with a single part number/device.