The ADP1740/ADP1741 are low dropout （LDO） CMOS linear regulators that operate from 1.6 V to 3.6 V and provide up to 2 A of output current. These low VIN/VOUT LDOs are ideal for regulation of nanometer FPGA geometries operating from 2.5 V down to 1.8 V I/O rails， and for powering core voltages down to 0.75 V. Using an advanced， proprietary architecture， the ADP1740/ ADP1741 provide high power supply rejection ratio （PSRR） and low noise， and achieve excellent line and load transient response with only a small 4.7 μF ceramic output capacitor. The ADP1740 is available in seven fixed output voltage options. The ADP1741 is an adjustable version that allows output voltages ranging from 0.75 V to 3.3 V via an external divider. The ADP1740/ADP1741 allow an external soft start capacitor to be connected to program the startup. A digital power-good output allows power system monitors to check the health of the output voltage. The ADP1740/ADP1741 are available in a 16-lead， 4 mm × 4 mm LFCSP， making them not only very compact solutions， but also providing excellent thermal performance for applications that require up to 2 A of output current in a small， low profile footprint.