本文設(shè)計了擴展的乘累加單元(DSPMAC)，用于運算速度的提高?；?a target='_blank' class='arckwlink_none'>or1200 乘累加單元，運用RISC技術(shù)和并行操作，通過開發(fā)32-bit 指令中的保留位，在資源占用增幅較少和一定的功耗及溫度等代價的前提下，本設(shè)計對連續(xù)乘累加運算實現(xiàn)加速。經(jīng)過測試，DSPMAC 達到了運算加速的目的。
關(guān)鍵詞: 乘累加; 精簡指令集計算機；速度；功耗；溫度

Abstract: This paper designed an extended multiplication-accumulator unit, DSPMAC, to achieve calculation accelerating. Based on or1200 multiplication-accumulator unit, using RISC technology and parallel operation to exploit the reserved bits in 32-bit instruction, the design tried to achieve accelerating of continuous multiplication-accumulator operations with less increase of resource occupation and some cost of power andtemperature. According to the testing results, DSPMAC unit has achieved the purpose.
Key words: DSP multiplication-accumulator （DSPMAC）; RISC; speed; power consumption; temperature