資料介紹
Introduction
Historically, the mechanical
performances of multilayered thin-? lm
metal stacks have been dif? cult to
characterize for failure by any means.
Recent developments in nanoscratch
techniques, though, have made great
headway in the examination of ? lm
failure of these multilayered ? lm stacks.
Scratch testing has commonly been
used for characterizing the adhesion of
single ? lms to the substrate materials.
Now, with the ability to survey the
surface before and after the scratch
test, the scratch process can be used
to evaluate the type of failure occurring
at different interfaces throughout
multilayered ? lm stacks. In this study,
eight ? lm stacks were tested to
examine failure in individual layers of
the samples. All of the samples had
between three and four metal layers
ranging in thickness from 100nm to
500nm. These samples were labeled as
“Good” or “Bad” by the manufacturer.
All of the samples were characterized
using a ramp-load scratch test. The
ramp-load scratch test was used for
determination of the Critical Load for
each layer in the ? lm stack samples.
Results from the scratch tests were
used to de? ne the difference in the
scratch response between “Good”
and “Bad” samples.
Historically, the mechanical
performances of multilayered thin-? lm
metal stacks have been dif? cult to
characterize for failure by any means.
Recent developments in nanoscratch
techniques, though, have made great
headway in the examination of ? lm
failure of these multilayered ? lm stacks.
Scratch testing has commonly been
used for characterizing the adhesion of
single ? lms to the substrate materials.
Now, with the ability to survey the
surface before and after the scratch
test, the scratch process can be used
to evaluate the type of failure occurring
at different interfaces throughout
multilayered ? lm stacks. In this study,
eight ? lm stacks were tested to
examine failure in individual layers of
the samples. All of the samples had
between three and four metal layers
ranging in thickness from 100nm to
500nm. These samples were labeled as
“Good” or “Bad” by the manufacturer.
All of the samples were characterized
using a ramp-load scratch test. The
ramp-load scratch test was used for
determination of the Critical Load for
each layer in the ? lm stack samples.
Results from the scratch tests were
used to de? ne the difference in the
scratch response between “Good”
and “Bad” samples.
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