| DSP | 2 C66x |
| DSP MHz (Max) | 500 |
| Operating system | Android, Linux, RTOS |
| Ethernet MAC | 1000, 2-port 1Gb switch |
| PCIe | 2 PCIe Gen2 |
| TI functional safety category | Functional Safety-Compliant |
| Rating | Automotive |
| Operating temperature range (C) | -40 to 125 |
DRA78x 處理器采用 367 焊球、15mm×15mm、0.65mm 焊球間距（0.8mm 間距規則可用于信號）（通過 Channel? 陣列 (VCA) 技術實現）、球柵陣列 (FCBGA) 封裝。
此架構旨在昨用經濟高效的解決方案，為汽車協處理、混合無線電和放大器應用提供高性能并發性 ， 實現 DRA75x（“Jacinto 6 EP”和“Jacinto 6 Ex”）、DRA74x“Jacinto 6”、DRA72x“Jacinto 6 Eco”和 DRA71x“Jacinto 6 Entry”信息娛樂處理器系列的全面可擴展性。
此外，德州儀器 (TI) 提供一整套針對 Arm 和 DSP 的開發工具，其中包括 C 語言編譯器和一個實現源代碼執行可視化的調試接口。
DRA78x Jacinto 6 RSP（無線電音頻處理器）系列器件符合 AEC-Q100 標準。
該器件 采用 簡化的電源軌映射，這使得低成本電源管理集成電路 (PMIC) 解決方案得以實現。
The DRA78x processor is offered in a 367-ball, 15×15-mm, 0.65-mm ball pitch (0.8mm spacing rules can be used on signals) with Via Channel? Array (VCA) technology, ball grid array (S-PBGA) package.
The architecture is designed to deliver high-performance concurrencies for automotive co-processor, hybrid radio and amplifier applications in a cost-effective solution, providing full scalability from the DRA75x ("Jacinto 6 EP" and "Jacinto 6 Ex"), DRA74x "Jacinto 6", DRA72x "Jacinto 6 Eco", and DRA71x "Jacinto 6 Entry" family of infotainment processors, including voice, HMI, multimedia and smartphone projection mode capabilities.
Additionally, TI provides a complete set of development tools for the Arm, and DSP, including C compilers and a debugging interface for visibility into source code execution.
The DRA78x Jacinto 6 RSP (Radio Sound Processor) device family is qualified according to the AEC-Q100 standard.
The device features a simplified power supply rail mapping which enables lower cost PMIC solutions.
